Platform-based silicon products can include a combination of diffused intellectual property blocks (also referred to as IP or macro function blocks) and A-cell based transistor arrays. The IP blocks can include processor cores, high-speed interfaces, and memory. The combination of the IP blocks and the A-cell arrays form a base silicon wafer that can be configured through metal layers for different applications. Often, the diffused IP can be unused in a given application. However, the unused diffused IP blocks can still use routing and placement resources on the die.
It would be desirable to reuse the gates of unused diffused cell-based IP blocks in platform-based silicon products.